29-46

UDC 621.371.25; 550.388.2
DOI: 10.15350/2306-2819.2017.3.29

TABLE, INTERPOLATION AND ITERATION FUNCTIONAL CONVERTERS
FOR THE METHOD OF DIRECT DIGITAL FREQUENCY SYNTHESIS

D. V. Ivanov¹, V. A. Ivanov¹, O. V. Mikhadarova¹, V. V. Ovchinnikov¹,
M. I. Ryabova^1,2, E. V. Katkov¹
¹Volga State University of Technology,
3, Lenin Square, Yoshkar-Ola, 424000, Russian Federation
E-mail: IvanovVA@volgatech.net
²Bauman Moscow State Technical University,
5-1, 2-ya Baumanskaya Street, Moscow, 105005, Russian Federation
E-mail: miryabova@mail.ru

ABSTRACT

The paper discusses algorithms for functional converter in the method of direct digital synthesis harmonic oscillations (frequencies) DDFS. The method is used in various fields of technology, especially in radio communication and radiolocation. It allows to significantly reduce the dimensions and power consumption of the devices developed, especially with digital signal processing. Important parameters of harmonic oscillators are: noise level due to rounding errors during calculations; frequency spacing and the rate of transition from one frequency to another without a phase break. Errors are determined by the bit-width of words of the functional phase-amplitude converter, which contains the parameters tables of the synthesis algorithm implemented in ROM. The tables size increases with the increase in the bit-width, and, consequently, the dimensions and power consumption of the synthesizer also increase. Thus, the main scientific mission is the development of algorithms which allow to reduce tables size. The aim of the research was studying the theory and algorithms of the DDFS method, which allows to optimize the structure of the functional converter with respect to the ROM size. The paper presents the methods aimed at reducing tables size using table, interpolation and iterative converters. Paper presents the algorithm for compressing the sine table up to 4 times. The Sunderland algorithm, which divides the table into two parts with different bit-width, allows to reduce the memory size up to 51-165 times. Interpolation algorithms that split the phase values in the first quadrant into segments and interpolate the sin / cos functions on each segment using polynomial are presented. We considered polynomials of the first and second orders, as well as the Taylor polynomials. Such an approach is aimed at reducing the ROM size. Modifications of the CORDIC algorithm and its hybrid algorithms are iterative algorithms. The hybrid algorithm CORDIC + Taylor allows to achieve noise level of 110-120 dBc. The algorithms discussed can be used in transmitting equipment to minimize its dimensions and power consumption when synthesizing a modulating signal in a digital up converter (DUC), and algorithms for synthesis of oscillations with a minimum noise level in digital down converters (DDC) of digital receivers implemented using software-defined radio (SDR) technology.

KEYWORDS

digital frequency synthesizer; phase accumulator; CORDIC algorithm

FULL TEXT (pdf)

ACKNOWLEDGMENT

The work was carried out with the grant support from the Russian Foundation for Basic Research project: № 15-07-05280; 15-07-05294; 17-07-01590; 16-37-60068.

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For citation: Ivanov D. V., Ivanov V. A., Mikhadarova O. V., Ovchinnikov V. V., Ryabova M. I., Katkov E. V. Table, Interpolation and Iteration Functional Converters for the Method of Direct Digital Frequency Synthesis. Vestnik of Volga State University of Technology. Ser.: Radio Engineering and Infocommunication Systems. 2017. No 3 (35). Pp. 29-46. DOI: 10.15350/2306-2819.2017.3.29